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Enhanced Negative Bias Stress Degradation in Multigate Polycrystalline Silicon Thin-Film Transistors
In this brief, a negative bias stress (NBS) induced degradation in n-type multigate polycrystalline silicon (poly-Si) thin-film transistor (TFT) is investigated. It is observed that after NBS the transfer characteristic curves shift to the negative gate bias direction and multigate TFTs degrade more...
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Published in: | IEEE transactions on electron devices 2017-10, Vol.64 (10), p.4363-4367 |
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creator | Zhang, Dongli Wang, Mingxiang Wang, Huaisheng Yang, Yilin |
description | In this brief, a negative bias stress (NBS) induced degradation in n-type multigate polycrystalline silicon (poly-Si) thin-film transistor (TFT) is investigated. It is observed that after NBS the transfer characteristic curves shift to the negative gate bias direction and multigate TFTs degrade more than the single-gate TFTs with the same effective channel length. The observed degradation phenomenon is explained with short channel effect that is resulted from the diffusion and distribution of hole carriers in the channel, which are generated in the source/drain depletion region and swept into the channel when the junctions are reversely biased during NBS. Pronounced NBS degradation caused by increased hole carriers in the channel is also verified in NBS experiment with light illumination. |
doi_str_mv | 10.1109/TED.2017.2737489 |
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It is observed that after NBS the transfer characteristic curves shift to the negative gate bias direction and multigate TFTs degrade more than the single-gate TFTs with the same effective channel length. The observed degradation phenomenon is explained with short channel effect that is resulted from the diffusion and distribution of hole carriers in the channel, which are generated in the source/drain depletion region and swept into the channel when the junctions are reversely biased during NBS. Pronounced NBS degradation caused by increased hole carriers in the channel is also verified in NBS experiment with light illumination.</description><identifier>ISSN: 0018-9383</identifier><identifier>EISSN: 1557-9646</identifier><identifier>DOI: 10.1109/TED.2017.2737489</identifier><identifier>CODEN: IETDAI</identifier><language>eng</language><publisher>New York: IEEE</publisher><subject>Bias ; Charge carrier processes ; Degradation ; Light ; Logic gates ; Multigate ; negative bias stress (NBS) ; NIST ; poly-Si ; Semiconductor devices ; Silicon films ; Silicon wafers ; Stress ; Thin film transistors ; thin-film transistor (TFT) ; Threshold voltage ; threshold voltage shift</subject><ispartof>IEEE transactions on electron devices, 2017-10, Vol.64 (10), p.4363-4367</ispartof><rights>Copyright The Institute of Electrical and Electronics Engineers, Inc. (IEEE) 2017</rights><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c291t-22a92be2e0e82d1100bc9fe732bffe9b3db9bbb7f0da26ba7dd683c7ab7006d53</citedby><cites>FETCH-LOGICAL-c291t-22a92be2e0e82d1100bc9fe732bffe9b3db9bbb7f0da26ba7dd683c7ab7006d53</cites><orcidid>0000-0002-0556-5532 ; 0000-0001-7413-2311</orcidid></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/8012560$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>315,783,787,27936,27937,55124</link.rule.ids></links><search><creatorcontrib>Zhang, Dongli</creatorcontrib><creatorcontrib>Wang, Mingxiang</creatorcontrib><creatorcontrib>Wang, Huaisheng</creatorcontrib><creatorcontrib>Yang, Yilin</creatorcontrib><title>Enhanced Negative Bias Stress Degradation in Multigate Polycrystalline Silicon Thin-Film Transistors</title><title>IEEE transactions on electron devices</title><addtitle>TED</addtitle><description>In this brief, a negative bias stress (NBS) induced degradation in n-type multigate polycrystalline silicon (poly-Si) thin-film transistor (TFT) is investigated. It is observed that after NBS the transfer characteristic curves shift to the negative gate bias direction and multigate TFTs degrade more than the single-gate TFTs with the same effective channel length. The observed degradation phenomenon is explained with short channel effect that is resulted from the diffusion and distribution of hole carriers in the channel, which are generated in the source/drain depletion region and swept into the channel when the junctions are reversely biased during NBS. Pronounced NBS degradation caused by increased hole carriers in the channel is also verified in NBS experiment with light illumination.</description><subject>Bias</subject><subject>Charge carrier processes</subject><subject>Degradation</subject><subject>Light</subject><subject>Logic gates</subject><subject>Multigate</subject><subject>negative bias stress (NBS)</subject><subject>NIST</subject><subject>poly-Si</subject><subject>Semiconductor devices</subject><subject>Silicon films</subject><subject>Silicon wafers</subject><subject>Stress</subject><subject>Thin film transistors</subject><subject>thin-film transistor (TFT)</subject><subject>Threshold voltage</subject><subject>threshold voltage shift</subject><issn>0018-9383</issn><issn>1557-9646</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2017</creationdate><recordtype>article</recordtype><recordid>eNo9kE1LAzEQhoMoWKt3wUvA89Z8bDebo9ZWhfoBXc8h2cy2KdtsTbZC_70pLZ6GGZ53hnkQuqVkRCmRD9X0ecQIFSMmuMhLeYYGdDwWmSzy4hwNCKFlJnnJL9FVjOvUFnnOBshO_Ur7Giz-gKXu3S_gJ6cjXvQBYsTPsAzapnnnsfP4fdf2LmGAv7p2X4d97HXbOg944VpXJ6haOZ_NXLvBVdA-uth3IV6ji0a3EW5OdYi-Z9Nq8prNP1_eJo_zrGaS9hljWjIDDAiUzKaviKllA4Iz0zQgDbdGGmNEQ6xmhdHC2qLktdBGEFLYMR-i--Pebeh-dhB7te52waeTikouZc4LWSaKHKk6dDEGaNQ2uI0Oe0WJOrhUyaU6uFQnlylyd4w4APjHS0LZuCD8D196ceA</recordid><startdate>20171001</startdate><enddate>20171001</enddate><creator>Zhang, Dongli</creator><creator>Wang, Mingxiang</creator><creator>Wang, Huaisheng</creator><creator>Yang, Yilin</creator><general>IEEE</general><general>The Institute of Electrical and Electronics Engineers, Inc. (IEEE)</general><scope>97E</scope><scope>RIA</scope><scope>RIE</scope><scope>AAYXX</scope><scope>CITATION</scope><scope>7SP</scope><scope>8FD</scope><scope>L7M</scope><orcidid>https://orcid.org/0000-0002-0556-5532</orcidid><orcidid>https://orcid.org/0000-0001-7413-2311</orcidid></search><sort><creationdate>20171001</creationdate><title>Enhanced Negative Bias Stress Degradation in Multigate Polycrystalline Silicon Thin-Film Transistors</title><author>Zhang, Dongli ; Wang, Mingxiang ; Wang, Huaisheng ; Yang, Yilin</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c291t-22a92be2e0e82d1100bc9fe732bffe9b3db9bbb7f0da26ba7dd683c7ab7006d53</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2017</creationdate><topic>Bias</topic><topic>Charge carrier processes</topic><topic>Degradation</topic><topic>Light</topic><topic>Logic gates</topic><topic>Multigate</topic><topic>negative bias stress (NBS)</topic><topic>NIST</topic><topic>poly-Si</topic><topic>Semiconductor devices</topic><topic>Silicon films</topic><topic>Silicon wafers</topic><topic>Stress</topic><topic>Thin film transistors</topic><topic>thin-film transistor (TFT)</topic><topic>Threshold voltage</topic><topic>threshold voltage shift</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Zhang, Dongli</creatorcontrib><creatorcontrib>Wang, Mingxiang</creatorcontrib><creatorcontrib>Wang, Huaisheng</creatorcontrib><creatorcontrib>Yang, Yilin</creatorcontrib><collection>IEEE All-Society Periodicals Package (ASPP) 2005-present</collection><collection>IEEE All-Society Periodicals Package (ASPP) 1998–Present</collection><collection>IEEE Electronic Library Online</collection><collection>CrossRef</collection><collection>Electronics & Communications Abstracts</collection><collection>Technology Research Database</collection><collection>Advanced Technologies Database with Aerospace</collection><jtitle>IEEE transactions on electron devices</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext</fulltext></delivery><addata><au>Zhang, Dongli</au><au>Wang, Mingxiang</au><au>Wang, Huaisheng</au><au>Yang, Yilin</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Enhanced Negative Bias Stress Degradation in Multigate Polycrystalline Silicon Thin-Film Transistors</atitle><jtitle>IEEE transactions on electron devices</jtitle><stitle>TED</stitle><date>2017-10-01</date><risdate>2017</risdate><volume>64</volume><issue>10</issue><spage>4363</spage><epage>4367</epage><pages>4363-4367</pages><issn>0018-9383</issn><eissn>1557-9646</eissn><coden>IETDAI</coden><abstract>In this brief, a negative bias stress (NBS) induced degradation in n-type multigate polycrystalline silicon (poly-Si) thin-film transistor (TFT) is investigated. It is observed that after NBS the transfer characteristic curves shift to the negative gate bias direction and multigate TFTs degrade more than the single-gate TFTs with the same effective channel length. The observed degradation phenomenon is explained with short channel effect that is resulted from the diffusion and distribution of hole carriers in the channel, which are generated in the source/drain depletion region and swept into the channel when the junctions are reversely biased during NBS. Pronounced NBS degradation caused by increased hole carriers in the channel is also verified in NBS experiment with light illumination.</abstract><cop>New York</cop><pub>IEEE</pub><doi>10.1109/TED.2017.2737489</doi><tpages>5</tpages><orcidid>https://orcid.org/0000-0002-0556-5532</orcidid><orcidid>https://orcid.org/0000-0001-7413-2311</orcidid></addata></record> |
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source | IEEE Electronic Library (IEL) Journals |
subjects | Bias Charge carrier processes Degradation Light Logic gates Multigate negative bias stress (NBS) NIST poly-Si Semiconductor devices Silicon films Silicon wafers Stress Thin film transistors thin-film transistor (TFT) Threshold voltage threshold voltage shift |
title | Enhanced Negative Bias Stress Degradation in Multigate Polycrystalline Silicon Thin-Film Transistors |
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