A Supply-Noise-Induced Jitter Canceling Adaptive Filter for LPDDR5 Mobile DRAM

This article presents a supply-noise-induced jitter (SIJ) cancellation technique based on an adaptive filter (AF) using a least mean-square (LMS) algorithm. It cancels jitter along with the clock distribution network (CDN) and the transmit paths, which include serializers and pre-drivers. The propos...

Full description

Saved in:
Bibliographic Details
Published in:IEEE journal of solid-state circuits 2023-01, Vol.58 (1), p.270-278
Main Authors: Jung, Yeonwook, Lee, Seongseop, Kim, Hyojun, Cho, Seonghwan
Format: Article
Language:English
Subjects:
Adaptive filters
Adpative filter
Algorithms
Cancellation
clock distribution network (CDN)
Clocks
Delays
Detectors
Electrical engineering
Jitter
Random access memory
supply-noise-induced jitter
Vibration
Voltage control
Citations: Items that this one cites
Online Access:Get full text
Tags: Add Tag
No Tags, Be the first to tag this record!
Description
Summary:This article presents a supply-noise-induced jitter (SIJ) cancellation technique based on an adaptive filter (AF) using a least mean-square (LMS) algorithm. It cancels jitter along with the clock distribution network (CDN) and the transmit paths, which include serializers and pre-drivers. The proposed technique includes a second-order AF to maximize jitter cancellation in the clock path, which has a nonlinear supply-to-jitter characteristic. Implemented in 28-nm CMOS, the proposed SIJ cancellation scheme reduces the rms jitter of the output clock from 27.84 to 4.28 ps and improves the data eye-opening from 22.43 to 104.73 ps when operating at 6.4 Gb/s with a 60-mVPP, 1-MHz supply noise.
ISSN:0018-9200
1558-173X
DOI:10.1109/JSSC.2022.3203221