Search Results - Pandita, Bupesh

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  1. 1
    Delay calibration circuit for delay lines

    Delay calibration circuit for delay lines by Pandita, Bupesh

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  2. 2
    A Low-Ripple Resistor-Less Hybrid Loop Filter based PLL in 3nm FinFET

    A Low-Ripple Resistor-Less Hybrid Loop Filter based PLL in 3nm FinFET by Lu, Ping, Boecker, Charlie, Pandita, Bupesh, Chen, Minhan, Nayak, Sheethal

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  3. 3
    Oversampling A/D Converters With Reduced Sensitivity to DAC Nonlinearities

    Oversampling A/D Converters With Reduced Sensitivity to DAC Nonlinearities by Pandita, B., Martin, K.W.

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  4. 4
    Designing Complex ΔΣ Modulators with Signal-Transfer Functions having Good Stop-Band Attenuation

    Designing Complex ΔΣ Modulators with Signal-Transfer Functions having Good Stop-Band Attenuation by Pandita, Bupesh, Martin, K. W.

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  5. 5
    Design and implementation of a Viterbi decoder using FPGAs

    Design and implementation of a Viterbi decoder using FPGAs by Pandita, B., Roy, S.K.

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