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Search Results - KleinOsowski, A.J.
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MinneSPEC: A New SPEC Benchmark Workload for Simulation-Based Computer Architecture Research
by
KleinOsowski, A.J.
,
Lilja, D.J.
Published in
IEEE computer architecture letters
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Design Implications of Single Event Transients in a Commercial 45 nm SOI Device Technology
by
Kleinosowski, A.J.
,
Cannon, E.H.
,
Pellish, J.A.
,
Oldiges, P.
,
Wissel, L.
Published in
IEEE transactions on nuclear science
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Latch Design Techniques for Mitigating Single Event Upsets in 65 nm SOI Device Technology
by
KleinOsowski, A.J.
,
Cannon, E.H.
,
Gordon, M.S.
,
Heidel, D.F.
,
Oldiges, P.
,
Plettner, C.
,
Rodbell, K.P.
,
Rose, R.D.
,
Tang, H.H.K.
Published in
IEEE transactions on nuclear science
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Multi-bit upsets in 65nm SOI SRAMs
by
Cannon, E.H.
,
Gordon, M.S.
,
Heidel, D.F.
,
KleinOsowski, A.J.
,
Oldiges, P.
,
Rodbell, K.P.
,
Tang, H.
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POWER7TM local clocking and clocked storage elements
by
Warnock, J.
,
Sigal, L.
,
Wendel, D.
,
Muller, K.P.
,
Friedrich, J.
,
Zyuban, V.
,
Cannon, E.
,
KleinOsowski, A.J.
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The recursive nanobox processor grid: a reliable system architecture for unreliable nanotechnology devices
by
KleinOsowski, A.J.
,
KleinOsowski, K.
,
Rangarajan, V.
,
Ranganath, P.
,
Lilja, D.J.
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The NanoBox project: exploring fabrics of self-correcting logic blocks for high defect rate molecular device technologies
by
KleinOsowski, A.J.
,
Lilja, D.J.
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